Quest For Graduation: Trial by Fire

Once again, I find myself in the digital electronics lab at 2am (or, as I prefer, 0200) -- edit: by the time I finished writing this it was 0340. I'll swear I told myself I'd never do this again, but here I am making the same mistakes I made this time last year. My girlfriend (an engineer) is taking E85: Digital Design and Computer Architecture (required for engineers, not CS, but I took it last year for fun) and I offered to help her when she needed things explained. One of my primary functions should be helping her avoid all the little pitfalls in the terrible-does-not-deserve-to-exist-and-should-die-in-a-fire software that class uses called Xilinx ISE. How this software came to be industry standard I do not know, but it is and it is buggier than any game Sierra ever made back in the 90's. And that's hard to do (mind you, I do love my vintage Sierra games).

Despite my supposed wisdom from having experienced all this before I ran us into a 2 hour detour when I forgot that xilinx (look! I'm not even dignifying you with the capital letter deserved by proper nouns, you awful program!) is sensitive to which file you have selected when you tell it to run the simulator. Thus I ended up having her simulate the schematic file rather than the testbench file. The result: the simulator happily simulated the circuit with no input. It didn't have any test program to run through the circuit to check it, so it just said "Okay, your inputs are floating, so I can't really say what the outputs should be, but I've got it sitting here simulated." This led us on a merry 2 hour chase reorganizing how we did the input wiring in the schematic before I noticed that the wrong file was selected in the other window because xilinx is made of FAIL.

On top of the whole xilinx sucking thing, realize that there's a much better way to do this: HDLs. HDL is an acronym for Hardware Description Language. There are two popular (read: industry standard) HDLs: VHDL and Verilog. VHDL is an acronym for VHSIC HDL and VHSIC is an acronym for Very High Speed Intigrated Circuits program. It was developed by the Department of Defense. Hence the 2-level deep acronym. VHDL is more common in academia, and Verilog is more common in industry. Professor Harris, one time digital engineer for Intel, decided we should use Verilog. I digress. The point is, the cute little gui that gives everyone so many headaches in xilinx is really just a wrapper around verilog. When you click the buttons to make it simulate it writes (rather nasty) Verilog behind the scenes. If you wrote the Verilog yourself to begin with, as we do in later labs, you'd avoid all the headaches of xilinx and it'd be much faster to boot.

\end{rant}

By now I've probably scared you all off and bored the rest to tears. I had a nice paragraph here about what I think is cool about Verilog (it looks like a programming language, but each "function" is actually a hardware module so you can't treat it exactly like programming) but then blogger went and ate it, so I'll leave it with that bit inside the parenthesis. If anyone's particularly interested feel free to leave a comment for me and I'll describe it in more detail. To finish off I'll leave you with an interesting proposal: Professor Dodds teaches a class called "Programming Practicum" in which students must solve problems similar to those found on the ACM programming challenges. He gives bonus points for being the first to solve a problem in a particular obscure language. This has led people to solve some of his problems in languages like x86 assembly, Prolog, PostScript, and Tex, of all things. I think someone should solve one in Verilog, that is, someone should implement the solution in hardware and run a simulation to get the answer.

As a parting word, I'll give 10 points to the first person to correctly identify the inspiration to the recent post's titles.

~KMarsh